ARM Cores
ARM Processor Cores Almost every ASIC you will ever work on has an ARM core in it somewhere — running firmware, handling the boot chain, managing
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ASIC Design
From the Notebook
ARM vs RISCV
RISC-V vs ARM A comparison of RISC-V and ARM as competing instruction set architectures (ISAs) — licensing models, extensibility, ecosystem maturity, and typical deployment
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RISC-V Processor Cores You'll run into a RISC-V core anywhere someone wanted an ARM-class CPU without an ARM-class licensing
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Intro to RTL Design for ASICs Engineering notebook entry — plain-language primer, not a reference. 1. What "RTL" Means RTL stands for Register-
Read more →SystemVerilog
SystemVerilog One language covering three jobs: describing hardware that synthesizes into gates, specifying properties that formal and simulation tools check, and building the object-oriented
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